Asked design questions and you had to solve them. Questions were related to digital design and logic such as drawing a logic gate circuit. did not make it to second interview.

Interview process was pretty neat. It took place in Qualcomm atheros campus at San Jose. The interview wass for 3.5hrs and it consists of 4 technical (45mins each) and 1 HR round (15mins). The questions were pretty damn straight which involved project related questions, programming and some general quesstions.