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      Physical Design Engineer Interview

      31 Jul 2025
      Anonymous interview candidate
      No offer
      Neutral experience
      Difficult interview

      Application

      I interviewed at TSMC

      Interview

      Asked 1) Relevant Projects to role?2) What is PVT in Electronics and why do we care about it? Rest of interview, was spent on discussing how Master's qualification was not met, meant exclusion from role.

      Interview questions [1]

      Question 1

      How do you plan to study your Masters?
      Answer question

      Other Physical Design Engineer interview reviews for TSMC

      Physical Design Engineer Interview

      4 Apr 2025
      Anonymous employee
      Hsinchu
      Accepted offer
      Positive experience
      Average interview

      Application

      I interviewed at TSMC (Hsinchu)

      Interview

      It was good , technical interview on questions related to my internship mostly which was on physical design ( basic questions and concepts related to that ) ….. also questions on whether I am willing to Relocate to Taiwan and also my learning from my internship experience

      Interview questions [1]

      Question 1

      What is the role of boundary and tap cells in PnR ?
      1 Answer

      Physical Design Engineer Interview

      21 Feb 2024
      Anonymous interview candidate
      Kānpur, Uttar Pradesh
      No offer
      Positive experience
      Average interview

      Application

      I applied through university. I interviewed at TSMC (Kānpur, Uttar Pradesh) in Dec 2023

      Interview

      TSMC came to our campus, shortlisted the candidates through resumes, and took the interview of shortlisted candidates. The interview had only one round, and the duration was around 20 minutes.

      Interview questions [1]

      Question 1

      1. What would you prefer, NAND or NOR, to make any circuit and why? 2. What is the cause of setup and hold time? 3. Draw a D latch using transmission gates and explain how it works. 4. Some questions related to basic gates
      Answer question

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