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      ASIC Design Engineer Interview

      1 Feb 2013
      Anonymous interview candidate
      Santa Clara, CA
      No offer
      Average interview

      Application

      I applied online. The process took 2 days. I interviewed at Ambarella (Santa Clara, CA) in Jan 2013

      Interview

      Initially applied online and got email for interview. They seems to tend to interview local candidates so I am told to drop by their office directly. It is an 1-hour interview with several questions which include state machine, sorting, and testing. ASIC design is really different from Analog. Huge programming skills are required. Nice people there.

      Interview questions [1]

      Question 1

      1. sequence detector 2. get second largest number of a unsorted array 3. setup and hold time 4. some testing questions.
      1 Answer

      Other ASIC Design Engineer interview reviews for Ambarella

      ASIC Design Engineer Interview

      30 Oct 2024
      Anonymous interview candidate
      No offer
      Positive experience
      Average interview

      Application

      I applied through university. I interviewed at Ambarella

      Interview

      Go through your resume first and than some basic technical questions and finally you need to do coding. The interviewee doesn’t just want your answer but also the reason. For example.if you give an solution they may ask you why you choose that one

      Interview questions [1]

      Question 1

      How to solve CDC problems
      Answer question

      ASIC Design Engineer Interview

      5 Apr 2017
      Anonymous interview candidate
      No offer
      Positive experience
      Average interview

      Application

      I applied online. The process took 1 week. I interviewed at Ambarella

      Interview

      1 hour phone interview. the interviewer is very nice. but no hints or feedback for each answer. wrote several basic verilog questions on a shared white board. system verilog applied online, soon received interview email announcement.

      Interview questions [1]

      Question 1

      Asynchronous FIFO full empty
      1 Answer

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